Kazuo UCHIDA (内田 和男)

Offer Organization: Japan Society for the Promotion of Science, System Name: Grants-in-Aid for Scientific Research, Category: Grant-in-Aid for Scientific Research (B), Fund Type: -, Overall Grant Amount: - (direct: 14900000, indirect: -)
In this research project, we made an attempt to make a nanocrystal memory using a silicon substrate on which Ge nanocrystalls are deposited with a good control of the positioning and size. Dr. Berbezier at CRMC2, Marseille, France provided the Si substrates with Ge nanocrystals deposited by MBE, and we made MOS capacitors by embedding Ge nanocrsytals in SiO_2. The most important but difficult part of the project is to deposit Ge nanocrstals with a good control of positioning and size. Dr. Berbezier and her group members developed a technique to grow the Ge nanocrstals on the FIB-patterned Si substrates. In this technique, the Ga is implanted in the Si substrates by focused ion beam (FIB) and farms the defective area locally. It was found the Ge selectively grew on the damaged area in the MBE growth of Ge. Using this selective epitaxy of Ge, Ge nanocrystals can be arranged. With the optimized growth condition, Dr. Berbezier successfully achieved an array of Ge nanocrystals on Si. However, the array was not one monolayer, and some Ge nanocrystals were stacked. Such a sample did not show a significant flatband voltage shift by injecting electrons in Ge nanocrystals.
Nozaki and his group proposed a technique to form a high-density of Ge nanocrystals in a monolayer. In this technique, the Ge nanocrystals were deposited on the tunnel oxide by the gas evaporation with a supersonic jet nozzle. Using this deposition method, the Ge nanocrystals with a good uniformity in the size were obtained. They are, however, stacked. The Ge nanocrystals were annealed to remove the extra naocrystals on the monolayer. Because of strength of bonding between Ge nanocrystals and SiO_2, one monolayer of Ge nanocrystals remained without losing any nanocrystals on SiO_2 after complete removal of the extra nanocrystals. Then, the Ge nanocrystals were exposed to UV light for photo-oxidation, which electrically isolates the Ge nanocrystals by oxidizing the Ge nanocrystals. After depositing the control oxide on the Ge nanocrystals, the MOS capacitors with the Ge nanocrystals as a floating gate were fabricated. The C-V showed the hysteresis to confirm the electron injection in the nanocrystals. Although the gate electrode with the Ge nanocrystals proved to be useful in the nanocrystal memories, the further improvement of charge retention is required for practical application.

Offer Organization: Japan Society for the Promotion of Science, System Name: Grants-in-Aid for Scientific Research, Category: Grant-in-Aid for Scientific Research (B), Fund Type: -, Overall Grant Amount: - (direct: 6300000, indirect: -)
The aim of the research program is to develop international collaboration of education and research on nano-structured semiconductor materials and devices between Griffith University Group (GUG headed by Professor Barry Harrison) and our group (UECG). We have invited twice Mr. J.Combes, a post-graduate student of GUG as an : exchange student, who has made excellent contribution to the progress of the research on the semiconductor position sensitive detector. As a research interchange between GUG and UECG, several academic staffs from both. Universities have visited each other to develop nana-structured semiconductor devices using various semiconductor process facilities in both Universities. We have developed the position sensitive devices using a current-dividing resistor composed of granular metal as well as many GalnP/GaAs photo-detectors. We: have also investigated the phase transformation induced by nano-structuring of semiconductors.' In addition to the discovery of the new phase of nano-structured Ge, we have also found that nano-structured Si can transform to the Wurzite structure, a high-pressure form of crystalline Si. The stability of the high-pressure forms of crystalline Ge have been studied by applying hydrostatic pressure as high as 10GPa. The cluster-size in nano-structured Ge films deposited by the cluster-beam evaporation technique becomes very uniform by the photo-oxidation. We have found that the photo-oxidized Ge films can show the coulomb blockade effect even at the room temperature. The possible single electron devices using this phenomenon has been discussed in both UECG and GUG.

Offer Organization: Japan Society for the Promotion of Science, System Name: Grants-in-Aid for Scientific Research, Category: Grant-in-Aid for Scientific Research (C), Fund Type: -, Overall Grant Amount: - (direct: 3700000, indirect: -)
We have fabricated and characterized the nano-porous thin films of SiOx grown by Gasevaporation technique in oxygen atmosphere for the application of inter-dielectric in future VLSI technology. It was found that most of the samples had the dielectric constant below 2 as measured by the capacitance method and their porosity were over 90% as measured by the X-ray total reflection method. However, due to high porosity, water absorption into films, measured by FT-IR, was found to be inevitable and resulted in the increase of dielectric constant. In order to avoid this water absorption, we have proposed the HMDS (Hexamethyl disilan) method. We found that the dielectric constant of the film grown at 0.5 torr oxygen atmosphere with HMDS treatment was as low as 1.4. In comparison, we measured the dielectric constant of as-deposited sample in vacuum that was annealed at 623 K and found that it was as low as 1.3. On the other hand, we have fabricated nano-porous thin films of SiOx by post oxidation Si nano-porous grown by Gas-evaporation technique. These samples contained less absorbed water than SiOx samples grown by Gas-evaporation technique in oxygen atmosphere. Typical dielectric constant of these samples were as low as 1.4 without HMDS or high temperature annealing. These results prove that our SiOx films grown by simple Gas-evaporation technique are versatile and can be applied to future VLSI technology without modifying existing systems.